ACD Automated Circuit Design
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VII) DESIGNING OHMEGA-PLY® RESISTORS

B) Designing Ohmega-Ply® Resistors in Allegro

by Chuck Michie of Automated Circuit Design

Ohmega-Ply® resistors can be readily designed with Allegro layout tools. The following description outlines the details for creating symbols, and implementing them into a layout. It is assumed here that the user is familiar with the Ohmega-Ply® geometry's required to create desired resistor values, therefore this document will deal only with implementation in Allegro.

Ohmega-Ply® resistors will typically be a minimum of 10 mils wide so a 10 mil diameter pad is defined for the layer the resistor is to be defined for. Ex: 10rd_ly4.pad. Adding the layer in the pad name insures that the pad can be edited in the PCB editor for only the layer it will be used on.

Symbols must be specifically defined for resistor value, resistive material used, resistor width, and layer used. All of these factors may be shown in the symbol name. For example or150_100_10ly4.psm or or1k_100_10ly4.psm. These would be 150 ohm and 1k ohm respectively, 100 ohm material, 10 mils wide on layer 4.

Create a symbol and add an etch subclass to be used such as Etch/Ly4. Add 2 pins at desired locations. Add two subclasses under Package_Geometry for the resistor copper between pins and the 2nd etching image such as Package_Geometry/Ohmega_Res_L4 and Package_Geometry/2nd_Etch_L4. Add the copper pattern on the Ohmega_Res_L4 subclass, and the 2nd etching image on 2nd_Etch_L4 subclass. Add a subclass for the reference designator such as Refdes/Ohmega_Res_Ly4, and add the designator to the symbol. Add a route keep out between pins, and via and package keep outs over the entire symbol to prevent routing, via and placement violations. The symbol is now complete and may be placed on the specified positive layer and connected to a trace, via or thru pin. The pad used should be edited using pad edit so that the pad is defined only on the layer the resistor is on.

Defining and routing resistors for negative plane layers is a bit more involved. These resistors must have a clearance line placed around the resistor copper area and the pin or via to be connected to. This could be done on the etch layer to be used or on another subclass added in Package_Geometry. Examples of this may be seen in the Ohmega-Ply® design guide. The pad defined for the resistor pins must be able to be nulled out in the artwork process, so the pad name should identify this. Ex: 10rd_ly2_null.pad. This pad definition must have a thermal flash name which may be nulled out as well for connecting to the plane layer. The 2nd etch image, Reference designator, route, via and package keep outs may be defined just as in the positive resistor symbol.

Once the negative plane resistors is brought into the board it must be placed such that the clearance line falls around the via or thru pin to be connected to, with the other side of the resistor open to the voltage plane. This side of the resistor will connect to the plane with the dummy thermal flash when the plane shape is added to the board. To connect the resistor pin to the via or thru pin a new via or pin pad-stack must be defined which has a null anti-pad on the plane layer being used. The new pad-stack may be added by replacing the original via with the new via pad, or by doing a pad-stack replace for a thru pin. This will achieve a connection on the artwork but at this point the connection still shows between the resistor pin and the via or thru pin. The connection may be made by adding a dummy etch layer, defining the resistor pad to be on this layer as well as the negative layer, and connecting the resistor to the via or thru pin on this dummy etch layer. This dummy layer will not be used in the final artwork.

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Ohmega-Ply® is a registered trademark of Ohmega Technologies, Inc. 4031 Elenda St., Culver City, CA

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