Designing a PCB with Buried Resistors Using BoardStation

By Bob Sterrett <bob_sterrett@hp.com> Hewlett-Packard Company, Colorado Springs Division

1900 Garden of the Gods Road

Colorado Springs, CO 80907

 

Why Use Buried Resistors?

Buried resistor technology replaces discrete resistors with thin film planar resistors laminated within multilayer printed circuit boards. Space previously occupied by discrete resistors may now be used for additional components, trace routing, or eliminated to create smaller, denser boards.

Using buried resistors can significantly shorten signal paths. These results in reduced lead inductance, shorter signal paths, and improved impedance matching.

Assembly costs can be reduced when buried resistors replace enough discrete resistors on a board.

Refer to resistive ply manufacturers, such as Ohmega Technologies Inc. (http://www.ohmega.com), for more design information.

What Are Buried Resistors?

A very thin resistive sheet is laminated between the foil and fr4 for a board layer. Etching is controlled in different passes so that there can be places where both the foil and the resistive sheet are etched, as well as places where the foil but not the resistive sheet are etched.

Two foil areas connected by only resistive materials form a resistor connecting the two areas.

The material thicknesses in this illustration are not to scale.

How Buried Resistors Affect Fabrication Data:
Additional Gerber Files:

Each PCB layer that has buried resistors requires a second set of photo tooling (Gerber) data.

The normal layer has metal over resistive material, so it behaves like a normal metal layer. It therefore uses normal Gerber data. It defines areas where both metal and resistive material should be etched.

To create a resistor, a rectangle is drawn to define the area between the pads for metal (but not resistive) etch. This requires a second set of photo data (a second Gerber file) for each buried resistor layer.

To create this second Gerber file, use Librarian to Edit Artwork Order. When you define this new "Artwork Layer", you need to specify the logical layers that will be combined to define it.

New Logical Layers:

A logical layer set needs to be defined to hold the shapes defining the secondary etch patterns. I defined a logical layer named RES_ETCH and top and bottom mapping layers of RES_ETCH_1 and RES_ETCH_2.

Returning to the artwork order, I configured the top side's resistive layer secondary Gerber file to be generated based on logical layer RES_ETCH_1. RES_ETCH_2 drove the bottom side's secondary Gerber file.

Two Layer Limit:

While buried resistor technology supports resistors on any inner PCB layer, BoardStation only understands placing components on the top and bottom sides of a board. This means that you should only plan on using two layers of buried resistors using this methodology.

How Do the Resistors Get Buried?

While we are used to surface mounted components placing pads on the top or bottom board layers, we need our buried resistor pads on inner layers. How do you place pads on inner layers? My HP colleagues from Santa Rosa, CA inspired me to use blind pins in my buried resistor components. Blind pins are configured for each board for drilling depth and connect rules. No drilling is involved for buried resistors. Set the pin's no-connect rules (Librarian: Setup Design Rules -> Pin Rules...) to connect only the two physical layers that will be fabricated for buried resistors. Do this for all of the pin geometries (described later) used for buried resistors.

In this example, the board is burying resistors on layers 2 and 5 of the 6 layer board.

Resistor Geometry Definition:

As is normal with BoardStation parts, the design information is captured in both component and pin geometries. Create the pin geometries as blind pins. This provides the control through the no-connect rules to place the buried resistor pads only on their inner layers.

In my example, I did not use any of the shape and attribute creation features in the Create Blind Pin dialog box. I used the form to name the geometry. After creating the geometry, I drew rectangles to define the metal+resistor shape.

My example used a tabbed rectangle drawn on the generic SIGNAL layer. It has a square area for the trace to connect to, the "resistor contact pad area" (0.005 in x 0.015 in), and (more than) half of the area of the resistor's resistive material. In this example, each of the two resistive areas is defined as 0.040 in wide, even though they will eventually be overlapped to form a resistive area 0.060 in wide. It is important to overlap the two pin geometries in the component geometry, since the shape will define the area to keep (not etch) metal-over-resistive-material. Overlapping the pads ensures that the resistive material will not be etched away between the pads. Refer to your resistive material manufacturer's design information for guidelines on metal pad and resistive area sizes.

In this example, a 4 square (0.060 in x 0.015 in) resistor is designed. If the board is fabricated with 25 Ohm per square resistive material, this will be a 100 Ohm resistor, while if the board is fabricated with 100 Ohm per square resistive material we will have a 400 Ohm resistor. A resistor of 0.015 in. by 0.060 in. met our resistive, power, and size needs

While the primary (metal and resistive) etch area is defined by the two pads, the secondary etch (removing metal but not resistive material) is defined with a rectangle on the RES_ETCH layer in the component geometry. Buried resistor design guidelines call for the rectangle to be drawn larger than the metal area in the axis orthogonal to the pin axis. This overlap allows some mis-registration between the primary and secondary etches for the layer. In the drawing above, the RES_ETCH rectangle is 0.060 in. by 0.021 in. (0.015+0.003+0.003 in.).

The other required shape is the COMPONENT_PLACEMENT_OUTLINE. I drew a bounding polygon around the pads and RES_ETCH rectangle.

Placement Issues:

As mentioned earlier, BoardStation's ability to support buried resistors is limited by its two-sided component placement model. While assembly and fabrication process would allow buried resistors to be placed under components, Layout complains when a buried resistor's placement outline overlaps the placement outline of the surface mounted component above it. We have dealt with this by manually inspecting for placement violations, then selectively setting Layout to ignore the placement violations. Without a concerted effort throughout BoardStation by Mentor to support buried resistors, I do not anticipate any user level change that could solve these problems.

DRC:

A mis-registered secondary etch might overlap another metal (+resistive) feature. This would cause a conductive feature to become a resistive feature. BoardStation does not have a check to identify such a potential design problem.

I have had a board fabricator specify a minimum spacing from resistors to drilled holes. I presume this is to isolate any drill-induced distortion of the resistive material from a resistor. BoardStation also does not have a check to identify such an issue.

"Near Win" With Resistor Calculator:

Mentor's HybridStation option to BoardStation has a resistor calculator designed for generating screened resistor for hybrids. While buried resistors are similar to screened resistors, screened resistor fabrication is an additive process (add resistive ink) as opposed to the subtractive etching process used for buried resistors. Screened resistor pads are grown for ink mis-registration, while the secondary etch rectangle is grown for buried resistors. More importantly, buried resistor pads need to overlap to provide the resistive path, where overlapped hybrid resistor pads would short out the resistor.

Summary:

As long as you are willing to endure the placement and DRC issues, BoardStation can be used to design PC boards containing buried resistors. Products currently shipping from Hewlett-Packard use this technique successfully.