ACD Automated Circuit Design
[TABLE OF CONTENTS]

VII) DESIGNING OHMEGA-PLY® RESISTORS

D) Designing Ohmega-Ply® Resistors in Pads PowerPCB

by Chuck Michie of Automated Circuit Design (ACD)

This document outlines the details for creating decals for Ohmega-Ply resistors and implementing them into a Pads PowerPCB design. It is assumed here that the user is familiar with the Ohmega-Ply geometry's required to create desired resistor values, therefore this document will deal only with implementation in PowerPCB version 1.5.

Decals must be specifically defined for resistor value, resistive material to be used, resistor width, and the layer they will be placed on. All of these factors may be shown in the Part Type and Decal names (for example OR150_100_10L3 or OR5.7K_100_10L3). These would be 150 ohm and 5.7k ohm resistors respectively, using 100 ohm Ohmega material, 10 mils wide on layer 3.

For resistors on signal layers, start a new decal and edit the layer setup to match that of the pcb layer setup. Add 2 pins at the desired locations and edit the padstacks to define a 5 mil circle on the signal layer where Ohmega resistors will be placed. Zero out the pads on all other layers, as well as the drill size. Add the resistor copper pattern, on the same layer, between the defined pins. Note that PowerPCB does not yet support route and via keepout areas. This results in the need to place two overlapping copper lines, one starting at the center of pin 1 and ending close to pin 2, and the other which starts at pin 2 and ends close to pin 1. The first copper line is then associated with pin 1, and the second is associated with pin 2. This associated copper acts as a route/via keepout over the area of the resistor pattern. The resistor etch area is then placed as a copper rectangle on another layer below the bottom layer. For example, if resistors are defined on Layer 3 the resistor etch image might be placed on Layer 13. The resistor etch artwork is then generated by selecting copper for layer 13 in the CAM setup. Note that without route/via keepouts care must be taken to ensure that traces and vias have a minimum of 5 mils clearance from the resistor etch area to prevent them from being etched into in the case of mis-registration of the resistor etch artwork.

It is preferred to generate a reference artwork for the Ohmega resistors showing the resistor locations, reference designators, and value. PowerPCB, at this time, does not support placing the decal name (ref des) on an internal layer, and these will appear on the top silkscreen. If the Ohmega resistor designators are given a prefix such as "OR" they can be suppressed on the top silk plot file. The reference designator and resistor value can be placed for each resistor as text on another unused layer, such as layer 15 in the example above. The reference artwork is then generated by selecting copper for layer 13 and text for layer 15 in the CAM setup.

Defining and routing resistors for negative plane layers is a bit more involved. These resistors must have an isolation channel placed around the resistor copper area, which defines its width, and the via or thru pin to be connected to. Examples of this may be seen in the Ohmega-Ply Design Guide. This isolation line can be placed on the plane layer to be used for the Ohmega resistors. The terminals placed for the resistor pins must be able to be nulled out on the artwork, so a unique pad size should be used such as a 2 mil circle. Also, the via or thru pin which the isolation channel surrounds must not have a clearance pad for this plane layer so that the copper will connect it to the resistor pin. An extra routing layer is added in the design, which serves two purposes. It provides a layer to connect the resistor pin, which must be defined on this extra as well as the plane layer, to the via or thru pin which the isolation channel surrounds. If this is not done the connectivity check will show a missing connection, even though the artwork will have copper connecting the resistor to the via or thru pin. Secondly, a copper path is placed on this extra layer in the decal, overlaying the isolation channel, and associated to the inner resistor pin. This copper acts as a via keepout for the resistor area. The resistor etch image and Reference designator may be defined just as in the positive resistor symbol.

When the negative plane resistors are brought onto the board they must be placed such that the isolation channel falls around the via or thru pin to be connected to, with the other side of the resistor open to the voltage plane. A via padstack, with no plane clearance pad, must be defined for use only with these resistors. If these resistors are placed on a thru pin then the padstack for that pin must be edited to remove the plane clearance pad. This will achieve a connection on the artwork, but the resistor pin must also be connected to the via or thru pin on the extra routing layer. This extra layer will not be used in the final artwork and no other signals can be routed on it. The reference artwork can be set up just as previously described for the signal layer resistors.

These methods for designing Ohmega-Ply resistors in Pads PowerPCB provide full logic and design rule checking capabilities and all resistors are controlled by the schematic or netlist input.

A sample PowerPCB database with signal and plane layer Ohmega resistors may be obtained by sending and email request to chuck@acdesign.com.

AUTOMATED CIRCUIT DESIGN (ACD) is a full service PCB design service bureau, Laser Photoplotting house and a manufacturer's representative. Their equipment list includes the Cadnetix (Intergraph), Cadence Allegro, Racal Redac CAD Star and PADS PCB software packages. They have offices in both Dallas and Houston.

Ohmega-Ply ( is a registered trademark of Ohmega Technologies, Inc.) 4031 Elenda St., Culver City, CA